Interval timing system for contacts of circuit switching devices having one or more poles and series resistor modules

ABSTRACT

A timing function is accomplished to display time intervals between closures or openings of the contacts of single pole or multipole series group operated circuit switching devices or similarly operating sets of contacts. Time interval between opening or closing of the first pole and the second and third poles opening or closing is achieved. Similarly sequencing times for multiple series gaps constituting one pole can be measured. Additionally the timing for insertion and removal of series resistor elements within one pole can be determined. The device can be operated under conditions existing in a high voltage substation.

United States Patent [191 Goldbach INTERVAL TIMING SYSTEM FOR CONTACTS OF CIRCUIT SWITCHING DEVICES HAVING ONE OR MORE POLES AND SERIES RESISTOR MODULES Related U.S. Application Data Continuation of Ser. No. 198,784, Nov. abandoned.

U.S. Cl 324/28 R, 324/28 SE Int. Cl G01r 31/02 Field of Search 324/28 R, 28 SF, 186

References Cited UNITED STATES PATENTS ll/l95l Baker 324/!86 6/1956 Zaffurano 324/]86 OTHER PUBLICATIONS 7 Time Interval Measurement and How to Make [451 Apr.9,1974

Them, Beckman Instrument Co., Publication, Feb. 10, 1958, pp. 1-10.

Primary Examiner-Alfred E. Smith Assistant ExaminerR0lf Hille Attorney, Agent, or Firml(irland & Ellis [57] ABSTRACT A timing function is accomplished to display time intervals between closures or openings of the contacts of single pole or multipole series group operated circuit switching devices or similarly operating sets of contacts. Time interval between opening or closing of the first pole and the second and third poles opening or closing is achieved. Similarly sequencing times for multiple series gaps constituting one pole can be measured. Additionally the timing for insertion and removal of series resistor elements within one pole can be determined. The device can be operated under conditions existing in a high voltage substation.

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. f 725 SQUARE eE i RiTon INTERVAL TIMING SYSTEM FOR CONTACTS OF CIRCUIT SWITCHING DEVICES HAVING ONE OR MORE POLES AND SERIES RESISTOR MODULES This is a continuation, of application Ser. No. 198,784 filed Nov. 15, l97l, now abandoned.

This invention relates, generally, to circuit switching device contact opening and closing time intervals and constitutes an improvement over the apparatus disclosed in Harman et al U.S. Pat. No. 3,492,565 issued Jan. 25, 1970 and the patents referred to therein.

Among the objects of this invention are: To provide for measuring the time intervals associated with opening and closing contacts of circuit switching devices; to measure the time intervals between the openings or closures of the contacts of three pole group operated circuit switching devices; to measure the time intervals for insertion and removal of a series resistor element within each pole; to provide readout on a panel display withut use of oscillographic instruments; to provide accuracy on the order of milliseconds necessary for timing current interrupting devices; the inclusion of isolation and filteringcircuits to permit use of sensitive electronic circuits in a high electrical noise environment of A a high voltage station; and to provide complete versatility for measuring opening times, closing times, resistor insertion times on opening and closing and total operating time from relay contact closure or operating mechanism energization.

A circuit switching device employed for switching three phase high voltage circuits has three poles or individual sets of contacts that are operated by a common operating mechanism. While it may be desirable that these contacts be opened or closed simultaneously, as a practical matter this is unlikely to occur. Further it may be desirable to maintain some predetermined interval between contacts on an opening sequence or contacts on a closing sequence. Switch poles may open in a sequential manner: A-B-C, C-A-B, A-C-B etc. with the second and third pole not opening at the same time. A similar sequence of operations takes place in the closing of the contacts of the three poles but it may not be in the same order. The time differential usually is of the order of milliseconds. Thus it is desirable that the times of contact closing and opening be measured with an accuracy of this order.

The sequence of operation of a high voltage power switching device may include the insertion and removal of a series resistor. This resistor is usually in the load circuit only momentarily, i.e., time on the order of milliseconds. The purpose of this resistor is a combination of the following:

1. On closing of the switching device (a) to reduce the magnitude of inrush current and (b) to limit the switching surge voltage.

2. On opening of the switching device (a) to reduce the magnitude of current to be interrupted and (b) to limit the rate of rise of recovery voltage.

If this resistor is not in the circuit long enough, the desired effect on operation of the power switching device may not beachieved. On the other hand, if the resistor is in the circuit too long, thermal failure of the resistor may occur. Each resistor and contact combination constitutes a switching module and provision is made for sequentially operating the contacts to insert and remove the resistor.

It is a conventional technique to use oscillographic instruments for determining timing information. For example a Cincinnati timer may be employed. However, such apparatus is cumbersome and time consuming. The present invention provides direct digital readout of the required time intervals employing simple lead connections and push button operation.

In the drawings:

FIG. 1 is a view, in front elevation, of the front panel of a sequence timer embodying this invention, it being understood that the circuitry and components for the timer are located in a suitable housing (not shown) in the rear of the panel which carries operating knobs, external circuit jacks, and a binary coded digital display in the form of lamps. FIGS. 2A, 2B and 2C, placed side by side inthe order mentioned, show a schematic diagram of the circuitry for the sequence timer and how it is connected to the circuit switching contacts. FIGS. 3A, 3B, 3C and 3D'placed side by side in the order mentioned show diagrammatically the circuit connections that are employed for certain of the circuit elements shown schematically in FIGS. 2A and 28. FIGS. 4 and 5 show alternate connections and sources for the timing signal applied to the switch contacts.

Referring to FIG. 2A of the drawing, it will be observed that an example of a switching contact arrangement of a three pole circuit breaker is indicated at 10A, 10B, 10C, 12A, 12B, 12C, and 13A, 13B, 13C. 10A, 10B and 10C are contacts, referred to hereinafter sometimes as a main contacts and represent the typical contacts of various types of circuit interrupting devices. This arrangement of contacts is only an example since other arrangements exist with which the timing system embodying this invention can be used. For opening and closing the contacts 10A, 10B and 10C there is provided a switch operating mechanism that is indicated at 11. The mechanism 11 is shown diagrammatically and may be of any conventional type. For the purposes previously outlined series resistors 12A, 12B and 12C are provided and, as shown, are connected in series with the contacts 10A, 10B and 10C respectivelyfFor inserting the series resistors 12A, 12B and 12C in the circuit and for removing them from the circuit by short circuiting them the resistor shunting contacts 13A, 13B and 13C are employed.

For the purpose of timing the relationship between the opening and closing of the various contacts, above referred to, the normal high voltage switching device circuit connections are disconnected and the contacts 10A, 10B and 10C are commonly connected by a conductor 14 to the sequence timing system. Individual conductors 15A, 15B and 15C are connected, respectively, to the opposing switching device terminals and, in a manner to be described, they are connected to the input side of the sequence timer. In view of the foregoing it will be understood that the contacts 10A, 10B and 10C, the series resistors 12A, 12B and 12C and their-shunting contacts 13A, 13B and 13C are illustrative of a circuit breaker or circuit switching device of conventional construction on which tests are to be made for determining the timing relationships for the several contacts so that this information can be employed for adjusting their operation or other purposes as may be desired. The conductors 14 and 15A, 15B and 15C constitute test leads which interconnect the various poles of the circuit switching device to the sequence timer, the remaining circuitry shown in the drawings being incorporated in a unitary structure.

Referring now to FIG. 1, the reference character 20 designates, generally, a panel for a sequence timer which may be mounted at the front of a housing containing the circuitry comprising the sequence timer. The various devices mounted on the panel 20 will now be described and subsequently related to the circuitry. There is provided a reset push button 21 that is arranged, when depressed, to reset the sequence timer circuitry to the initial or zero position. The time indication is provided by display lamps 22 which form a part of a time display of conventional construction that is indicated at 23. It will be noted that the lamps 22 are arranged in three rows of four lamps each and numbered from bottom to top as indicated. Also the rows are indicated from left to right. The calibration of the system as such that, when the bottom row of lamps 22 is lighted the indication is either 11.1 or 1 l l milliseconds (ms) depending upon the setting of a range switch which can shift the sensitivity of the display 23 by ten. When the top and bottom rows of lamps are lighted the indication is either 99.9 or 999 depending upon the setting of the range switch. The individual digits are obtained by adding the numbers vertically to obtain the value of the digit. The time display 23 is conventional and other time displays can be employed and other ranges used. Since the time display 23 is of conventional construction a detailed disclosure of it will not be set forth herein.

Continuing on with the description of the apparatus mounted on the panel 20, the reference character 24 designates a power ON-OFF switch for a 115 VAC power source. For varying the range indicated by the time display 23 there is employed a range switch knob 25 that can be set to indicate a multiplier of either one or ten as shown. Only a single time display 23 is provided. It is used to display time intervals of each of the three poles of the circuit breaker by means of a display selector switch 26, FIG. 2C, operated by a knob 26', FIG. 1. A phase selector switch knob 27 is employed to select the individual pole of the circuit switching device to be tested for module open and module close functions. Depending upon the particular information that is desired, there is provided a function selector switch knob 28 that is arranged to be shifted to any one of four positions. The first is module open position of the knob 28 which is used to measure the time for inserting the resistor module during the opening operation of the circuit switching device for any one of the individual poles. The second position is module close which provides the information desired in connection with the time of insertion of the resistor module of any one of the poles of the circuit switching device during its closing sequence. The third position is pole open in which the timing interval of opening of the contacts A, 10B and 10C can be determined relative to each other. The fourth and last position is pole close" which is employed for determining the relative timing interval for closing the contacts 10A, 10B and 10C.

In view of the fact that the series resistors 12A, 12B and 12C may vary from one circuit switching device to another although they are of identical resistance for a particular device, provision is made for employing a number of resistors having difference ohmic values from which may be selected a resistor having a value comparable to the ohmic value of the series resistors 12A, 12B and 12C. A voltage divider is set up by means of the switching device insertion resistor 12A, 12B and 12C and a sequence timer internal resistor, to be described. The internal resistor is selected to divide the oscillator voltage to about half its nominal value when the switching device internal resistor 12A, 128 or 12C is inserted. For switching between these various resistors, for example, from 50 ohms to 400 ohms in 50 ohm steps, there is provided a module resistor selector knob 29. The particular pole of the circuit breaker that is selected for observation is controlled by the phase selector switch knob 27. As shown it has 3 positions corresponding to the three poles.

At the bottom of the panel 20 there are provided pole input jacks 30A, 30B and 30C which are arranged to be connected to the circuit switching device under test by the conductors 15A, 15B and 15C. Also there is provided an oscillator jack 31 for receiving a conductor, which is the conductor 14 previously gates to, the oscillator being a part of the sequence timer within the housing associated with the panel 20. A ground terminal 32 is provided on the panel 20 for receiving a conductor which is fastened to station ground.

Referring now to FIG. 28 it will be noted that the oscillator is indicated at 35. For example it may be an oscillator of conventional design having an output of IOKI-lz. It will be understood that other frequencies can be employed, it being desirable that a relatively high frequency be used for timing accuracy. The oscillator 35 is connected to the conductor 14 through a coupling capacitor 36, and booster ampl fiers 37 and 38. The oscillator 35 may be a crystal or similarly stablized device.

With a view to excluding from the conductor 14 frequencies of the order of Hz there is provided a low pass filter 40 which is connected between the conductor 14 and ground. The filter 40 is so arranged and constructed that it constitutes an open circuit to the frequency generated by the oscillator 35 and a short circuit for 60 Hz to ground.

As shown in FIG. 2A similar low pass filters 41A, 41B and 41C are connected between the conductors 15A, 15B and 15C, respectively, and ground. Their function is to further reduce the possibility of unwanted signals getting through.

Referring to the central portion of FIG. 2A it will be noted that the conductors 15A, 15B and 15C are connected to a function switch that is indicated at 42. It is arranged to be operated by the knob 28, FIG. 1, and comprises a large number of decks of fixed and movable contacts to be referred to hereinafter. Associated with the function switch 42 is a phase selector 43. It is operated by the knob 27, FIG. 1, and comprises several decks of fixed and movable contacts that also will be referred to hereinafter.

When the time of module opening and module closing is to be determined, various resistors are provided, as indicated, for selection to correspond to the resistance of the particular series resistors 12A, 12B and 12C. They are included in a resistive termination that is indicated at 44. The knob 29 controls the selection of the particular resistor to be used. When operating in the module mode, the resistive termination 44 is employed in conjunction with the function switch 42. Switches 45 and 46 are operated by the knob 28 of the function selector to select the proper reference level for a module comparator 49 andpole comparators 50A, 50B and 50C.

Associated with the module comparator 49 is a module retriggerable monostable multivibrator 51. Similarly, pole retriggerable monostable multivibrators 52A, 52B and 52C are provided for operation under the control of the comparators 50A, 50B and 50C, respectively. A module open/close switch 53 is associated wtih the output of the module monostable multivibrator 51. Likewise pole open/close switches 54A, 54B and 54C are associated with the monostable multivibrators 52A, 52B and 52C, respectively.

The monostable multivibrator 52 drives NAND gates 55 and 56 that are employed in conjunction with module opening as shown in FIG. 2B. NAND gates 57A, 57B and 57C and 58A, 58B and 58C are employed in conjunction with the monostable multivibrators 52A, 52B-and 52C, respectively, for use in pole sequence timing. In addition NAND gats 59 and 60 are provided. Gate 59 is associated with the NAND gates 57A, 57B and 57C, and 58A, 58B and 58C during a pole start. Gate 60 is associated with NAND gates 61 and 62 which are employed in connection with the external starting functions. For controlling the operation of the NAND gate 62 there is provided a relay 63 under the external control of a voltage start circuit 64 and a relay start circuit indicated at 65. It will be understood that the various NAND gates previously described are, as indicated, RESET/SET flip flops.

' Also shown in FIG. 2B are reset switches '21 and 21" which are arranged to be operated by the push button 21 for reseting the sequence timer to the zero or initial position. A range switch 25 is shown here which is arranged to be operated by the knob 25 previously referred to.

The output of the oscillator 35 is applied through a square wave generator 66 and through the range switch 25' so that a wave form of this character can be employed for timing or clock purposes.

As shown in FIG. 2C an inverter 70 is interposed between the NAND gates 59 and 60. Also an invert buffer 72 applies the clock pulse to four input start/stop NAND gates 73A, 73B and 73C.

The NAND gates 73A, 73B and 73C are arranged to control, respectively, pole A, B,- and C decade counters 74A, 74B and 74C. In order to prevent operation of the decade counters in the event that the range of the time display 23 is exceeded, over range eight input NAND gates 75A, 75B and 75C are employed and are interconnected between the NAND gates 73A, 73B and 73C and the respective counters 74A, 74B and 74C.

As shown in FIG. 2C a conductor 76 is arranged to be energized from a 115V 60I-Iz source. The conductor 76 is illustrated as being connected to a power supply 77 which contains the usual transformers and rectifiers to provide the various voltages and polarities indicated for operating the various components of the sequence timer and also for operating the display 23.

Referring now to FIGS. 3A-D, it will be observed that the circuit connections here shown illustrate in more detail the circuit connections involved in the circuitry of the sequence timer illustrated schematically in FIGS. 2A and 2B. Attention is directed to the fact that the function switch 42, which is operated by the knob 28 to any one of four positions comprises decks 42A to 42K inclusive. The necessary circuit connections are completed and shifted when the knob 28 is moved from one position to the other as may be required and depending upon the tests that are to be made with respect to the contacts 10A, 10B and 10C and the resistor shunting contacts 13A, 13B and 13C.

In FIG. 3A it will be observed that the phase selector 43, which is operated by the knob 27, comprises of four decks 43A to 43D inclusive.

The resistive termination 44, in FIG. 3A, is operated by shifting the knob 29 in order to connect any one of eight resistors in the circuit for use in connection with tests involving module opening and module closing. These resistors indicated at 79A-79I-I, are of different values each value corresponding to the value of the particular resistors 12A, 12B and 12C utilized for the particular switch construction being tested.

In FIG. 3B band pass filters 83A, 83B and 83C are illustrated. They are arranged and constructed to permit transfer therethrough of only the 10KHz from the oscillator 35.

In FIG. 3D the reference characters 84A, 84B and 84C each represent four two input NAND gates. They comprise the NAND gates 55-62 shown in FIG. 2B of the drawings.

When the relative times for closing our opening of the contacts 12A, 12B'and 12C of the circuit switching device poles are measured, the contacts 13A, 13B and 13C shunting the resistors, 12A, 12B and 12C are bypassed and thus do not enter into the timing or sequencing measurements. For the pole closing function, the first pole to close starts all three pole decade counters 74A, 74B and 74C and immediately stops the first pole decade counter. The counting continues for the other two poles. The second decade pole counter stops when the second pole closes and finally the third pole decade counter stops when the third or last pole closes; For the pole opening function, the first contacts of the contacts 12A, 12B and 12C to open starts the counting for the three poles and stops the counting for the first pole. The second pole to open stops the counting for that pole while the counting for the third or last pole to open continues until the third pole opens and the counting for it stops.

The times for insertion and short circuiting of the resistors 12A, 12B and 12C are determined individually for each pole. For the module opening function, the main contacts, for example contacts 10A, of a pole initially are closed and likewise the shunting contacts 13A of the associated resistor 12A are closed. The counting starts when the shunting contacts 13A are opened to insert the resistor 12A in the circuit in series with the main contacts 10A. The counting stops when the main contacts 10A are opened. For timing the module closing function, initially the main contacts, for example contacts 10A, of the pole and the associated shunting contacts 13A are open. The counting starts when the main contacts 10A close and insert the resistor 12A in series in the circuit. The counting stops when the shunting contacts 13A are closed to remove or short circuit Generally the system functions by using the lOKl-Iz as a time base to operate as an internal clock in conjunction with pole decade counters 74A, 74B and 74C, one complete three digit counter for each switch pole. The oscillator frequency can be any value convenient for the timing interval range desired. The output of the oscillator 35 also is applied to the three poles of the circuit switching device to provide a voltage signal used for stopping and starting the pole decade counters 74A, 74B and 74C as required.

For the pole closing function, at the start of the sequence, the contacts A, 10B and 10C of the three poles are open. As soon as the first pole of the circuit switching device closes, the lOKHz is applied to the function selector 42. When this signal is greater than the voltage reference of .the associated voltage comparator 50A, 508 or 50C, it will then change state. The associated monostable multivibrator 52A, 523 or 52C will then produce an output signal. The chance of noise signals is reduced since the signals must be of the proper frequency and amplitude. A 0.03ms (millisecond) time delay introduced by the monostable multivibrator reduces the effect of contact bounce. The associated monostable multivibrator changes the state of the associated SET/RESET logic circuitry comprising NAND gates 57A, 578 or 57C and 58A, 58B or 58C to allow the associated STOP/START control 73A, 73B or 73C and pole decade counter 74A, 74B or 74C to operate.

In determining or measuring the time sequence for closing of the contacts 10A, 10B and 10C of the circuit switching device, the lOKI-Iz is absent to the three comparators 50A, 50B and 50C. When the contacts 10A, 108 or 10C close and the 10KI-Iz is present through this set of contacts, the associated monostable multivibrator switches and sets the respective SET/RESET flip flop 57A, 578 or 57C and 58A, 588 or 58C which allows the associated pole decade counter to count. In order for the clock pulse from the oscillator 35 to reach the pole decade counter 74A, for example, the following conditions must be met:

1. Clock pulse must be present.

2. Start signal from first of the contacts 10A, 10B or 10C to close must be present.

3. Stop signal from closure of contacts 10A, 108 or 10C must not be present.

4. Over range signal must not be present.

Any change in the above four conditions will stop and hold the count. The over range signal is triggered whenever the pole decade counters 74A, 748 or 74C are allowed to count out to 999.

Until they are reset, the pole decade counters 74A, 74B and 74C hold the counts for the individual poles, the first to close being zero. The counts on the pole decade counters 74A, 74B and 74C may be applied by display selector 26 to a binary display such as that provided by the lamps 22, FIG. 1 or a decade display.

The indications may be in milliseconds and the display may have a capacity of indicating up to 99.9 or 999 milliseconds.

In determining or measuring the time sequence for opening of the contacts 10A, 10B and 10C of the three poles of the circuit switching device, the 10 KHz is continuously applied through these contacts to the three comparators 50A, 50B and 50C. When the contacts 10A, 108 or 10C open and the 10 KHz is absent through this set of contacts for more than three cycles,

the associated monostable multivibrator switches and sets the respective reset flip flop 57A, 57B or 57C and 58A, 58B or 58C which allow the associated pole decade counter to operate. In order for the clock pulse to reach pole decade counter 74A, 748 or 74C the following conditions must be met:

1. Clock pulse must be present.

2. Start signal from first set of contacts 10A, 10B or 10C to open must be present.

3. Stop signal through contacts 10A, 10B or 10C must not be present.

4. Over range signal must not be present.

Any change in the above four conditions will stop and hold the count.

Many switching devices are available which, during switching insert a resistor such as the resistor 12A, 128 or 12C in series with the corresponding contacts 10A, 108 or 10C. The purpose of this resistor arrangement has been set forth hereinbefore. Initially for the module open function, the main contacts, such as contacts 10A, 10B and 10C, and the shunting contacts, such as contacts 13A, 13B and 13C, of the associated resistor, such as resistors 12A, 12B and 12C, are closed. When the associated contacts are opened, a resistor divider is set up between the resistor 12A, 12B or 12C and one of the resistors 79A-79H of the internal resistive termination 44 of the sequence timer which reduces the 10 KHZ signal by half. The result is that the module comparator 50A changes state and sets the associated logic circuitry causing the respective pole decade counter 74A, 74B or 74C to begin counting. The counting continues until the contacts, for example contacts 10A, are opened at which time the comparator 49, whose reference is at less' than half voltage, changes state. The insertion time then can be shown by the binary or decade display 23 on proper setting of display selector 26 by knob 26.

In timing inserting of the resistor 12A, for example on module closing, initially contacts 10A and the associated shunting contacts 13A are open. The 10 KHZ then is not present across the selected resistor 79A-79I-I of the resistor termination 44. When the contacts 10A are closed, the 10 KHZ half signal is detectedby the voltage comparator 50A and the monostable multivibrator 52A individual to the contacts 10A is triggered, the associated flip flop 57A and 58A changes state and the pole decade counter 74A starts to count. When the shunting contacts 13A close and the series resistor 12A is removed from the circuit by shunting, full oscillator voltage is sensed by the voltage comparator 49 and the count is stopped. The time then is indicated by the binary or decade display 23 after proper setting of display selector 26.

It may be desirable to measure the time between the energization of the switch operating mechanism 1 1 and the subsequent sequential operation of the contacts 10A, 10B and 10C. It is for this purpose that the relay 63, FIGS. 2A and 3D is employed to start the clock or application of the timing frequency from the oscillator 35 and square wave generator 66 to the NAND gates 73A, 73B and 73C. In this instance the voltage start circuit includes a relay having an operating winding 85 w and contacts 85a which effect energization of the switch operating mechanism 11. A push button switch 36 controls the energization of winding 85w. The relay 63 is connected across winding 85w and its contacts close to start the clock at the instant that the switch operating mechanism 11 is energized.

Relay 63 also can be energized when an external relay, such as an over current relay, is operated in order to determine the times between closure of the contacts of the over current relay and the sequential opening of contacts 10A, 10B and 10C. For this purpose contacts 87b of relay 87 represent the contacts of the over current relay. Contacts 87 are arranged to effect energization of the switch operating mechanism 11 to open contacts 10A, 10B and 10C. Winding 87w of relay 87 is energized on operation of push button switch 88. When relay 63 is energized the clock is started at the instant that contacts 87b are closed. The times required between this operation and the sequential openings of contacts 10A, 10B and 10C can be indicated on the display 23.

The 10K Hz oscillator 35, as illustrated in FIGS. 2A and 2B, performs a dual function. Not only does it provide a high frequency timing or clock pulse to measure with a high degree of accuracy the elapsed time for the various operations but also it furnishes the starting impulses or signals to initiate the timing function. However, it is not necessary that this dual function be accomplished. As illustrated in FIG. 4 a separate 10K Hz oscillator 35 can be employed solely to provide the starting signal. It will be understood that other frequencies can be used. Also, as shown in FIG. 5 a direct voltage source 35 can be employed to provide the starting signals. In that event, low pass series filters 40', 41"A, 41 'B and 41 'C are substituted for the low. pass parallel filters 40, 41A, 41B and 41C to avoid short circuiting the direct current from source 35".

I claim:

l. A device for measuring the time intervals between closing and opening changes in state of sets of contacts in a multiswitch switching device having more than one set of contacts in a parallel relationship comprising:

an oscillator means for providing frequency signals of a predetermined frequency;

means to convey the frequency signals to the sets of contacts in the switching device;

a multiplicity of output means each associated with i one of the sets of contacts to convey the frequency signals passed through an associated one of the closed sets of contacts of the switching device;

a multiplicity of comparator means for receiving the frequency signals from an associated one of said output means and comparing these frequency signals with a predetermined reference voltage level,

said comparator means being capable of switching fron a non-conducting to a conducting state when said frequency signals from an associated one of said output means exceeds the predetermined reference voltage level;

a multiplicity of time delay means for providing and maintaining a steady output gating signal in response to receipt of a frequency signal from an associated one of said comparator means so that sig nal interruptions are eliminated if the contacts in the switching device bounce during a change in state;

a square wave generator means for providing square wave pulses at a predetermined frequency;

a multiplicity of gating means for gating the square wave pulses through the gating means;

a multiplicity of counter means for counting the number of square wave pulses gated by an associated one of said gating means;

sequencing means for casing said gating means to gate the square wave pulses to each of said counter means upon a change of state of any one of the sets of contacts in said switching device, for causing the gating means associated with the first of the sets of contacts to change state to immediately stop gating the square wave pulses to the counter means associated with the first of the sets of contacts to change state, and thereafter for causing each of the other of said gating means to stop gating said square waves to the associated one of said counter means as each of an associated one of the sets of contacts changes state in response to receipt of the gating signals from said time delay means;

whereby the time interval between the changes of state of each of the sets of contacts can be measured.

2. A device, as claimed in claim 1, wherein said output means also comprises filtering means for filtering out undesired signals at frequencies other than the frequency of the oscillator means.

3. A device, as claimed in claim 1, wherein said output means also comprises resistance selection means for permitting a selection of resistance levels to be serially inserted so that the level of frequency signals conveyed to the comparator means can be selected.

4. A device, as claimed in claim 1, wherein said output means further comprises function selector means for permitting selection of variable reference voltage levels applied to said comparator means.

5. A device, as claimed in claim 1, wherein said sequencing means further comprises triggering relay means for causing each of the gating means to gate the square wave pulses to an associated one of the conter means upon the occurrence of a preselected event so that a subsequent change of state of each of the sets of contacts will stop the gating of square waves to the counter means whereby the time interval between the preselected event and the changes of state of each of the sets of contacts can be measured.

6. A device, as claimed in claim 1, wherein said square wave generator means is connected to said oscillator means so that said square wave generator means produces square waves at the same frequency as the oscillator means.

7. A device, as claimed in claim 1, further comprising over-range means associated with said counter means and said gating means to prevent gating of said square wave pulses to said counter means when the duration of the gatingof said square wave pulses exceeds the counting range of said counter means.

8. A device, as claimed in claim 1, wherein said oscillator means further comprises filter means for filtering out undesired signals at frequencies other than the frequency of the oscillator means. 

1. A device for measuring the time intervals between closing and opening changes in state of sets of contacts in a multiswitch switching device having more than one set of contacts in a parallel relationship comprising: an oscillator means for providing frequency signals of a predetermined frequency; means to convey the frequency signals to the sets of contacts in the switching device; a multiplicity of output means each associated with one of the sets of contacts to convey the frequency signals passed through an associated one of the closed sets of contacts of the switching device; a multiplicity of comparator means for receiving the frequency signals from an associated one of said output means and comparing these frequency signals with a predetermined reference voltage level, said comparator means being capable of switching fron a non-conducting to a conducting state when said frequency signals from an associated one of said output means exceeds the predetermined reference voltage level; a multiplicity of time delay means for providing and maintaining a steady output gating signal in response to receipt of a frequency signal from an associated one of said comparator means so that signal interruptions are eliminated if the contacts in the switching device bounce during a change in state; a square wave generator means for providing square wave pulses at a predetermined frequency; a multiplicity of gating means for gating the square wave pulses through the gating means; a multiplicity of counter means for counting the number of square wave pulses gated by an associated one of said gating means; sequencing means for casing said gating means to gate the square wave pulses to each of said counter means upon a change of state of any one of the sets of contacts in said switching device, for causing the gating means associated with the first of the sets of contacts to change state to immediately stop gating the square wave pulses to the counter means associated with the first of the sets of contacts to change state, and thereafter for causing each of the other of said gating means to stop gating said square waves to the associated one of said counter means as each of an associated one of the sets of contacts changes state in response to receipt of the gating signals from said time delay means; whereby the time interval between the changes of state of each of the sets of contacts can be measured.
 2. A device, as claimed in claim 1, wherein said output means also comprises filtering means for filtering out undesired signals at frequencies other than the frequency of the oscillator means.
 3. A device, as claimed in claim 1, wherein said output means also comprises resistance selection means for permitting a selection of resistance levels to be serially inserted so that the level of frequency signals conveyed to the comparator means can be selected.
 4. A device, as claimed in claim 1, wherein said output means further comprises function selector means for permitting selection of variable reference voltage levels applied to said comparator means.
 5. A device, as claimed in claim 1, wherein said sequencing means further comprises triggering relay means for causing each of the gating means to gate the square wave pulses to an associated one of the counter means upon the occurrence of a preselected event so that a subsequent change of state of each of the sets of contacts will stop the gating of square waves to the counter means whereby the time interval between the preselected event and the changes of state of each of the sets of contacts can be measured.
 6. A device, as claimed in claim 1, wherein said square wave generator means is connected to said oscillator means so that said square wave generator means produces square waves at the same frequency as the oscillator means.
 7. A device, as claimed in claim 1, further comprising over-range means associated with said counter means and said gating means to prevent gating of said square wave pulses to said counter means when the duration of the gating of said square wave pulses exceeds the counting range of said counter means.
 8. A device, as claimed in claim 1, wherein said oscillator means further comprises filter means for filtering out undesired signals at frequencies other than the frequency of the oscillator means. 